Static random access memory (SRAM) is a type of semiconductor memory that uses bistable latching circuitry to store each bit. Each memory cell of a SRAM memory array may be a bit cell used to store a single bit of information. Each of these bit cells may further include a number of transistors that may be biased by an operating voltage while a bit is being stored in the bit cell.
In the course of normal operation of the memory cell, some of these transistors may be subject to bias temperature instability (BTI), which may alter the threshold voltages of the transistors. BTI thus degrades the performance of the memory device over time. In the case of memory cells such as SRAM bit cells, BTI can introduce device mismatch depending on the duty cycle of the bit cell logic state. This device mismatch may further result in unbalanced “1” and “0” states, degrading the bit cell's stability and writability.